Various demo and test FPGA projects for Carte Blanche II
These pages 1-7 include example projects for experimentation with CBII, composed in Altium Designer 10 and/or Xilinx ISE12. Included are ported projects from the original CBI and peripherals, some new projects created to test CBII's capabilities and other general projects ported for experimental purposes. Please note these projects are works in progress and may have errors. If you're in a position to solve any bugs I would be very happy to include your solutions in these pages.
Note: .UCF and .BIT are included in the .ZIP of the downloadable AD project along with all the files required to compile using Altium Designer, as well as any source files used in creating/porting the project. All files required for porting to a different environment such as Xilinx ISE are supplied in the .ZIP.
All games are playable and interface to the Apple II keyboard. Keys are: A (up), Z (down), <-- (left), --> (right), X (jump/fire), C (coin), 1 (1 Player Start).
This project will test Carte Blanche II's 24 bit video capability by generating high resolution colour bars to drive the Analog Devices ADV7125 high speed Video DAC with an image that can be viewed on the HDMI, VGA and LCD interfaces.
This project is used to test the basic IO capability of the 5V Apple II bus interface. Using an Altium 'Configurable Instrument' to show the status of each of the bus IO pins, an external source such as a Nanoboard is able to provide testing patterns.
This Flash memory test demo uses a soft core CPU, SRAM memory and a soft terminal for reporting testing progress to identify, erase, read and then write a known test string into the 25P128 SPI serial Flash memory to confirm the device is working correctly.
This simple test uses a counter and several asynchronous logic circuits to setup and write a text message into two Osram 5V DL2416 intelligent LED display modules using an Altium 'Configurable Instrument' to change the message dynamically.
This example applies the memory test demo to an external DIP 5V HM6116 2K SRAM. A soft CPU, memory and a soft terminal provide status feedback of the testing procedure. As each test passes, a counter is incremented and the test runs again.
This example applies the memory test demo to an external DIP 5V uPD43256 32K SRAM. A soft CPU, memory and a soft terminal provide status feedback of the testing procedure. As each test passes, a counter is incremented and the test runs again.
This demo has been adapted to test CBII's FT2232 USB to UART controller. Using soft instruments, a Z80 soft CPU, memory, and a soft UART, the design can be used to setup a terminal to test communications between CBII and a serial host via USB.
Download AD10 version- Original Project was composed in Altium Designer 10 (27009).